A Combinational Approach of Modeling Analog Phase Locked Loop

In this paper a vital component of communication system, a general purpose analog Phase lock loop (PLL) is modeled using a novel combinational approach which apart from having a high speed also mimics IC behavior in Silicon. An analog/digital circuit simulator PSpice is used for the purpose. The advantage of SPICE is that it offers models that accurately define a CMOS process. Since, SPICE simulator is actually a standard CAD tool for IC design; modeling phase detector (PD) at primitive/component level improves accuracy. On the other hand, Voltage Controlled Oscillator (VCO) modeled using Analog Behavioral model (ABM) technique results in increasing speed. The proposed combinational approach is a cascade of primitive model of PD and behavioral model of VCO and has an overall effect to augment  accuracy. Not only the proposed model is more accurate but speed is also now comparable to less accurate behavioral model of PLL. The loop filter being a simple RC circuit can be modeled either by using ABM method or using PSpice primitives, and doesn’t affect simulation speed. The concept is used for modeling PLL IC LM 565. Key-Words:Phase Detector, Voltage Controlled Oscillator, PLL, PSpice, Analog Behavioral Model.